I. Field of the Disclosure
The technology of the disclosure relates generally to programming of non-volatile memory (NVM) in a processor-based system with a programming image comprised of instructions to be executed by a processor(s) in the processor-based system.
II. Background
A memory cell is a basic building block of computer data storage, which is also known as “memory.” Processor-based systems include memory for storing information. The memory may be used to store program instructions executed by a processor as well as data for use in executing program instructions. In certain embedded processor-based systems, non-volatile memory is embedded on a printed circuit board (PCB) separately from a processor and other peripherals and electronic components. In other embedded processor-based systems, non-volatile memory can be embedded in a system-on-a-chip (SOC) that also contains a central processing unit (CPU) or other processor and other supporting components. In either case, the non-volatile memory is configured to store embedded firmware that is executed by the processor on power-up starting at the reset vector address. The firmware stored in non-volatile memory is persistent over power cycles. An example of non-volatile memory is flash memory.
During fabrication of embedded processor-based systems, it may be desired to pre-program the memory with a program image of firmware during fabrication and/or assembly processes. In this manner, the processor-based system is already programmed when assembled and coming off a production line. The processor-based system can execute the pre-programmed firmware at first power-up. Programming interfaces, such as Joint Test Action Group (JTAG) interface or serial wire debug (SWD) interface, can be employed to program embedded memory. It may also be desired to program data in non-volatile memory in an embedded processor-based system during fabrication and/or assembly processes to test the integrity of data storage. For example, data patterns can be programmed into the non-volatile memory to determine if memory bitcells are defective.
For SOC processor-based systems, the non-volatile memory can be programmed at the chip die level before post-packaging processes are performed to allow the die to be tested by execution of the programmed firmware by the processor. This also allows the firmware to be pre-programmed in the non-volatile memory before the processor-based system is processed during packaging and post-packaging processes. However, if heat-sensitive memory is used as the non-volatile memory, the firmware programmed into the non-volatile memory at the chip die level may become corrupted. During assembly processes, the embedded memory on the PCB or in the SOC are exposed to extreme thermal conditions, such as a plastic molding process and/or a solder reflow process when the semiconductor devices are adhered to the PCB. For example, magnetic random access memory (MRAM) is a heat-sensitive non-volatile memory that has an advantage of retaining data after power is removed, but its ability to retain data is related exponentially to its temperature.
Thus, for processor-based systems that employ heat-sensitive non-volatile memory for storing firmware, to avoid risking data corruption, the non-volatile memory can be pre-programmed with a firmware image in-situ once the PCB of the processor-based system has been fabricated on a production line. However, the programming speed may be relatively slow, especially for large memory blocks, and thus cost prohibitive. For example, a JTAG programming interface typically has data transfer rates around twenty (20) megabits per second (Mbps). Thus, it would take approximately 12.8 seconds to load for a thirty-two (32) megabyte (MB) firmware image memory using a JTAG programming device. Alternatively, a separate read-only memory (ROM) that is not sensitive to the extreme temperatures experienced during the packaging processes could be employed in the processor-based system to store a programmed boot loader. For example, the ROM may be infused and/or provided in metal layers to be insensitive to extreme temperatures. The programmed boot loader could then be executed by the processor during post-packaging processes to load the firmware image into heat-sensitive non-volatile memory. However, this technique involves providing a separate ROM with separate associated cost. Also, the boot loader programmed into the ROM may have lower data transfer rates.